Chinese researchers create advanced transistor with ultralow power consumption
Wire desk byline Sourced from Xinhua, Dawn, Arab News, Anadolu and Minute Mirror. Translated and abridged by the GSRRA Desk.
A team of Chinese researchers has developed the world’s smallest ferroelectric transistor with ultralow power consumption, offering new insights into progress in the semiconductor industry, according to a study published recently in the journal Science Advances.
In advanced semiconductor manufacturing processes, the operating voltage of logic chips has been reduced to 0.7 volts to achieve high energy efficiency. However, mainstream non-volatile memory, such as NAND flash, previously required 5 volts or higher to complete write operations.
This mismatch leads to the integration of complex circuits for voltage step-up or step-down to enable collaboration between logic and memory units. Such integration resulted in additional power consumption, wasted space, and data transfer bottlenecks between logic and memory.
In typical AI chips, 60 to 90 percent of total power consumption is used for data transfer rather than computation. This has become one of the core constraints limiting improvements in AI computing power and energy efficiency.
The team from Peking University, led by Qiu Chenguang, a senior researcher, and Peng Lianmao, an academician of the Chinese Academy of Sciences, has developed nano-gate ferroelectric transistors with an ultralow operation voltage of 0.6 volts, successfully shrinking the physical size of the gate to 1 nanometer.
Reviewers of Science Advances note that these nano-gate ferroelectric transistor devices exhibit excellent memory performance, for the first time achieving voltage compatibility between ferroelectric memory devices and logic transistors. The physical mechanism behind this technology holds significant implications for the development of the memory sector.
Qiu said their findings resolve the challenge of voltage incompatibility between memory and logic. Data can now be transferred between memory and computing units at the same low voltage with zero barriers and ultra-low power consumption for high-speed interaction.
He added that the principle underlying this technology is universal and can be applied to mainstream ferroelectric materials. It can also be mass-produced using standard industrial processes, demonstrating strong industrial compatibility.
Notably, this technology is expected to be used in large model inference, edge intelligence, wearable devices, and Internet of Things terminals in the future.
Reference Link:- https://english.news.cn/20260216/d7b1da9fedf94aacbdf023cdf2effa13/c.html
Zamir Ahmed Awan is the founder and Chair of the Global Silk Route Research Alliance, a think tank in Islamabad. He studied engineering at Shanghai University in the 1980s, and years later he went back to China as Pakistan's science counsellor in Beijing, from 2010 until 2016, working on science and higher education cooperation between the two countries.…
